[Oficial] Intel Core "all" Series

[Jorge-Vieira]

Intel to describe its 18-core chip with 45MB cache in February

Intel Corp. will reveal technical details about its next-generation multi-core microprocessor for mission-critical servers next February at the 2015 IEEE international Solid-State Circuits Conference (ISSCC). The chip will be the most complex central processing unit ever made by Intel.
Intel Xeon E7 v3 “Haswell-EX” microprocessor for servers with up to eight sockets will integrate up to 18 cores with the Hyper-Threading technology, whopping 45MB of last-level cache (LLC), quad-channel DDR4 memory controller, PCI Express 3.0 links and so on. The new Xeon E7 platform is projected to bring in new reliability, availability, scalability (RAS) capabilities that will further bring features of Xeon platforms closer to those of Itanium-based servers.
The code-named “Haswell-EX” processor will be made using 22nm tri-gate process technology and will integrate whopping 5.56 billion transistors, making it one of the most complex x86 microprocessors ever. The die size of the “Haswell-EX” will be 663.5mm2, one of the largest in the history of CPUs, reports EETimes web-site citing description of the ISSCC presentations.

It is interesting to note that while Intel will disclose technical details about its 18-core processor only in February, 2015, the world’s largest chipmaker already ships such chips commercially. Intel Xeon processor E5-2699 v3 integrates 18 cores, 45MB of LLC and uses Haswell-EX silicon without RAS capabilities and some other features.

Noticia completa:
http://www.kitguru.net/components/cp...e-in-february/

[Winjer]

Intel’s third-generation Xeon Phi to use 10nm technology, deploy second-generation Omni-Path fabric

Intel has announced that its third-generation Xeon Phi, codenamed Knights Hill, will deploy on 10nm technology and feature the second iteration of Intel’s Omni-Path fabric. Knights Hill is quite a ways out — Intel’s Knights Landing, which is based on 14nm technology, won’t launch until the summer of 2015, which means Knights Hill is likely a 2017 (or later) part.Currently, Intel’s highest-end MIC (Many Integrated Core) is Knights Corner, a 22nm design with 50 or more cores and a design that derives from Intel’s classic Pentium (P54C), albeit with 512-bit AVX units and an entirely different memory architecture. Knights Landing will be built on 14nmand deploy the same Silvermont architecture that powers Intel’s Bay Trail. In a major departure, however, that future iteration of the core will support four threads per CPU — currently Silvermont doesn’t use Hyper-Threading at all.

Data on Knights Hill is currently extremely limited, but Intel is making the announcement now to reassure customers that there’s a roadmap stretching out beyond the Knights Landing product and the 14nm node. The first generation of Intel’s Omni-Path scaling architecture will debut next year. So far, Intel has focused on expanding the per-core capabilities of the Xeon Phi family rather than simply piling on more CPUs. Somewhere between 50-72 cores seems likely, though this could always creep up to 128 cores or more for the 10nm variant.
Future versions of the core will likely expand both the onboard memory pool (16GB is expected for Knights Landing; Knights Hill could pack 32GB or more), add additional bandwidth, and likely increase the interconnect performance between the CPU and the associated MIC. Intel might push its AVX standard up as high as 1024-bit registers, but this is unclear and likely depends on trends in the HPC community. Adding wider registers might seem like a simple way to boost performance, but it’s subject to the same diminishing returns as everything else. The current AVX specification allows for extensions of up to 1024 bits in length, however, so Intel has left this option open in the long term.
Knights Landing (the next card up for release) will feature on-package memory and the Silvermont core.

If Intel is introducing quad-threading into the Silvermont core for Knights Landing, it suggests that the company will keep this iteration of the CPU (and its multi-threading capabilities) for more than one generation. Whether it continues to build that capability out or whether the multi-threading is related to HT or uses a different type of resource allocation is still unknown. Companies like Sun and IBM have historically struck balances between the amount of threading in a core and its total single-thread throughput, and we expect Intel to do the same, even if Xeon Phi is explicitly designed for multi-threaded workloads.
Omni-Scale has been rebranded as Omni-Path, but the benefits are the same.

Omni-Path is Intel’s next-generation networking interconnect that offers up to 100Gbps of bandwidth and will rely on Intel’s silicon photonics technology for signaling. The new standard offers up to 48 ports per switch compared to 36 ports on other top-end standards, and is designed to lower the cost of huge build-outs by reducing the total number of switches. The longterm goal is to reduce latency and allow for more effective scaling as the industry pushes forwards towards the elusive exascale goal.
For now, however, it still seems that Nvidia has pulled ahead in the overall performance game. If K80 ships out before Knights Landing, it’ll give Nvidia a further lead. All of this is complicated by the fact that HPC users may or may not be interested in rewriting software to take advantage of new APIs — Intel and Nvidia have traded rhetorical shots on that topic before, and we don’t expect to see that change anytime soon.

Até gostava de ver a Intel a pegar no MIC e criar uma gráfica, como estava planeado inicialmente com este projecto, para competir com a AMD e a nVidia.
Pelo menos poder computacional não lhe parece faltar.

[Jorge-Vieira]

O que me chamou a atenção foram os 10nm, Intel mais uma vez bem à frente de todos neste tipo de processo.

[reiszink]

[Jorge-Vieira]

Fica aqui uma review aos Xeon (Haswell)

Intel Haswell-EP Xeon 14 Core Review: E5-2695 V3 and E5-2697 V3

Moving up the Xeon product stack, the larger and more complicated the die, the lower the yield. Intel sells its 14-18 core Xeons from a top end design that weighs in at over five billion transistors, and we have had two of the 14C models in for review: the E5-2695 V3 (2.3 GHz, 3.3 GHz turbo) and E5-2697 V3 (2.6 GHz, 3.6 GHz turbo).
The Information
It can only take one particular transistor to fail to break a whole CPU. If it happens in a core as part of the logic or caches, that core can be fused off and the die can sold as a lower core part. This is how yields are improved, by reusing the dies that have errors in removable sections. Ultimately this reduces the maximum amount of profit on offer, but it enables CPU manufacturers like Intel and AMD to sell a range of products, rather than just one from a single design. The way Intel designs its high end E5 V3 Xeons, from an 18-core die, means that its 14 core components either have at least two defects, or are perfectly fine 18 core models but need to fill up demand.

CPU Specification Comparison
	CPU	Node	Cores	GPU	Transistor Count (Schematic)	Die Size
Server CPUs
Intel	Haswell-EP 14-18C	22nm	14-18	N/A	5.69B	662mm2
Intel	Haswell-EP 10C-12C	22nm	6-12	N/A	3.84B	492mm2
Intel	Haswell-EP 6C-8C	22nm	4-8	N/A	2.6B	354mm2
Intel	Ivy Bridge-EP 12C-15C	22nm	10-15	N/A	4.31B	541mm2
Intel	Ivy Bridge-EP 10C	22nm	6-10	N/A	2.89B	341mm2
Consumer CPUs
Intel	Haswell-E 8C	22nm	8	N/A	2.6B	356mm2
Intel	Haswell GT2 4C	22nm	4	GT2	1.4B	177mm2
Intel	Haswell ULT GT3 2C	22nm	2	GT3	1.3B	181mm2
Intel	Ivy Bridge-E 6C	22nm	6	N/A	1.86B	257mm2
Intel	Ivy Bridge 4C	22nm	4	GT2	1.2B	160mm2
Intel	Sandy Bridge-E 6C	32nm	6	N/A	2.27B	435mm2
Intel	Sandy Bridge 4C	32nm	4	GT2	995M	216mm2
Intel	Lynnfield 4C	45nm	4	N/A	774M	296mm2
AMD	Trinity 4C	32nm	4	7660D	1.303B	246mm2
AMD	Vishera 8C	32nm	8	N/A	1.2B	315mm2

I mentioned in the 12 core review that Intel can play fast and loose with their binning process, giving customers almost what they desire in terms of performance and power, as long as they are willing to pay that price. The same could be said for the 14-18 core market, but rather than offer a swathe of units, Intel offers around half a dozen ranging from a 2.0 GHz 14-core to the E5-2699 V3 2.3 GHz 18-core. Intel could release a 65W, 18 core monster, and even though it might come through at 1.2 GHz, this type of SKU is not on the roadmap (unless, perhaps, you meet the high minimum order quantity). If given the opportunity, I would like to see the process by which Intel decides to select which SKUs to bin for retail vs. OEM and custom parts. I suspect it is a combination of part market demand, part yield, part wishful thinking, but I would hope it is at least systematic. Based on the core orientation image below, there might be complications dealing with that final column of six cores, against the other columns of four, either in voltage response characteristics or discrete production errors which might also have another effect.

Our samples in today come in with the E5-2695 V3 at 2.3 GHz base frequency (3.3 GHz turbo) and the E5-2697 V3 at 2.6 GHz (3.6 GHz turbo). When considering the Xeon naming stack, each number from 2695 to 2699 is taken except from 2696, and as such one might humorously postulate that Intel is merely running out of SKU names. Though an added L or W might find its way in if more models joined the list.

Ver a review toda:
http://www.anandtech.com/show/8730/i...-and-e52697-v3

[Jorge-Vieira]

Intel teases its Haswell-EX processor, which will feature 36 threads

During the 2015 IEEE international Solid-State Circuits Conference (ISSCC) in February 2015, Intel will reveal more technical details about its upcoming Haswell-EX processor. This processor will be the most complex CPU the company has ever made.

Intel's Xeon E7 v3 "Haswell-EX" processor will work in motherboards with up to eight sockets, packing 18 cores (and 18 Hyper-Threaded cores) for a total of 36 threads per CPU. We will also have 45MB of last-level cache (LLC), quad-channel DDR4 support, PCI Express 3.0 and much more. The new Intel Xeon E7 platform will usher in new reliability, availability, scalability (RAS) capabilities, something that will bring Intel closer to the older Itanium-based servers.

The Haswell-EX processor will be using Intel's 22nm Tri-Gate technology, packing in an insane 5.56 billion transistors, making it one of the most complex x86-based processors ever made.

Noticia completa:
http://www.tweaktown.com/news/41292/intel-teases-its-haswell-ex-processor-which-will-feature-36-threads/index.html

[Jorge-Vieira]

Intel Quark Liffy Island and Seal Beach Processors Roadmap and Details Leaked

Intel’s Quark processors mark the beginning of Intel’s next step in the miniaturization of the smart PC. However much like the early days of Atom, its not being taken very seriously at the moment with progress slow and lathargic. Slides showing detail about the project, specifically Liffy Island and Seal Beach, have just leaked from the site Myce.com.



Liffy Island and Seal Beach SoC Details Leak Out

“Liffy Island” processors will still have 1 CPU core with no support for Hyper-Threading. Core clock will be upped to 533 MHz and the size of L1 cache increased to 64 KB. The efficiency of the CPU efficiency is slated to be 1.5(Dhrystone MIPS)/MHz up from 1.25. 1 MB of L3 cache will also be included on board and support for DDR3 and DDR3L memory included. Interestingly ECC memory is supported as well and the maximum throughput the processors can stand is 1066 MT/s and the maximum ram 2GB. New I/O hardware upgrades on the Liffy Island SoC will be an 8-channel ADC controller, CAN bus ports and I2S support for Audio. Integrated Ethernet controllers will support speeds of upto 1GB/s. TDP of “Liffy Island” chips will be ~2 Watt, although even lower powered versions with around 1.5TDP will come soon.

Noticia completa:
http://wccftech.com/intel-quark-liff...etails-leaked/

[Dape_1904]

Parece ter um futuro promissor. Mas para já não passa de um Pentium 3 em raw power de CPU, apesar de consumir imensamente menos do que os Pentium 3 consumiam para terem a mesma performace. Como diz a notícia, é como os Atom, que no início eram muito maus e hoje em dia já equipam carradas de dispositivos. Vai levar o seu tempo a evoluir mas tem margem de progressão sem dúvida.

[Jorge-Vieira]

Intel’s 6th Generation Skylake Processors Scheduled For 2H 2015 – 5th Generation Broadwell in Spring ’15, Updates 2015 – 2016 Mobility Roadmap

Intel has yet again updated its processor roadmap showcasing that they are on schedule with their upcoming products such as Skylake, Broadwell, Braswell and the new mobility cores. There have been widespread rumors that Intel would be delaying their Skylake processors to 2016 but a second roadmap update debunks the false claims showing that 2015 would be a major update in regards to processor architecture and technology with the simultaneous launch of a Tick (Broadwell) and Tock (Skylake).

Image Credits: Zdnet

Intel Updates 2015-2016 Roadmap With 5th Generation Broadwell and 6th Generation Skylake CPUs

As we know, Intel has already launched their first iteration of their chips based on the Broadwell architecture codenamed “Core M”. We did a fairly detailed analysis of Core M (Broadwell-Y) a few months ago and from the looks of it, Core M is based on a true 14nm node from Intel and the same node would be carried over to the performance oriented chips arriving in Spring of 2015. Intel’s Core M will be adopted by performance tablets and mainstream notebooks in this quarter with reviews already hitting the web while the performance SKUs will be coming in Spring of 2015 and featured in high performance notebooks and All-In-One PCs.

Noticia completa:
http://wccftech.com/intels-6th-generation-skylake-processors-scheduled-2h-2015-5th-generation-broadwell-spring-15-updates-2015-2016-mobility-roadmap

[Dape_1904]

A ver se é com a nova fornada que passamos a ter portáteis que não tem um transformador paralelepípedo e podemos finalmente carregar o raio do computador com um cabo USB, tal como já acontece no Lenovo Yoga Pro 3, que tem o Core M.

[Jorge-Vieira]

Intel’s 14nm Xeon D Lineup Leaks Out – Eight Core SoC with ‘Big’ Cores Coming in Q2 2015

Intel announced the Xeon D platform a month ago in September and it consists of high powered SoCs based on the 14nm broadwell architecture. Infact, the platform was previously called Broadwell DE. We have seen Intel diversifying its lineups in the past with the introduction of Core M and now we see the same thing with Xeon D, which is basically merging the high powered Xeon processors with the low power requirements of Atom SOCs.

Closeup shot of a wafer containing Xeon E5 2600v3 dies @Intel Public Domain

‘Big’ Octa Core SoCs to feature in Intel Xeon D Preliminary Lineup

So blue here is using some pretty interesting buzz words, specifically ‘Big’ cores. I think what the marketing team at their HQ is trying to portray is the fact that even though the Xeon D platform consists of SoCs, they are not low performance, rather only low power. The cores are based on Broadwell Architecture and will support VT-X/VT-d virtualization, RAS features and the entire TXT, AVX2, TSX Instruction set (hopefully with the bug fixed). The chipset logic however will be incorporated on system and will make for a more efficient foot print than the customary two chip solution where the chipset logic lies on the motherboard.

Noticia completa:
http://wccftech.com/intel-xeon-d-lineup-leaks-soc-coming-q2-2015

[Jorge-Vieira]

Intel to hit 10nm in 2016, with 7nm CPUs arriving in 2018

Just nine years ago Intel was sitting at 65nm CPUs, reaching 22nm just three years ago now. We've been enjoying 14nm CPUs since last year, but now it's time to move onto 10nm, 7nm and beyond.

Broadwell arrived as the Core M processor, but for the 14nm desktop CPUs, we will be waiting until sometime in 2015. After the 14nm-based desktop Broadwell processors arrive, we have to look forward to 10nm sometime late next year or possibly 2016, while 7nm is planned for 2017 or so. The 10nm node is going to be an interesting transition, as the semiconductor industry will have to upgrade to EUVL technology.

Noticia completa:
http://www.tweaktown.com/news/41582/...018/index.html

[Dape_1904]

Chiça... Faço ideia do consumo/performance de um chip de 7nm...

[Winjer]

Wow! 2 anos para passar de 10 para 7 nm.
A lei de Moore está mesmo a tornar-se irrelevante.

[Sardo]

Se vires bem vai de encontro ao encontro ao que se tem passado desde 2005 para cá, em que a cada 2 anos existe uma diminuição de cerca de 30 % no processo de fabrico. A excepção foi mais a passagem dos 22 nm para os 14 nm em que a diminuição foi perto dos 40 %. A diferença é que diminuir o processo em 10 ou 20 nm nos parece muito mais significativo do que passar dos 10 para os 7 nm que parece quase irrelevante, mas que na realidade em termos percentuais corresponderá a um salto evolutivo semelhante. Afinal de contas, estamos a falar de 3 anos para chegarmos a um processo de fábrico que é metade de um que praticamente ainda não existe no mercado e só em 2015 é que começará a aparecer em força, o de 14 nm.